RK3399
RK3399 is a low power, high performance processor for computing, personal mobile internet devices and other smart device applications.
RK3399.PDF 商品信息
RK3399 is a low power, high performance processor for computing, personal mobile internet devices and other smart device applications. Based on Big.Little architecture, it integrates dual-core Cortex-A72and quad-core Cortex-A53 with separate NEON coprocessor.（點擊即可咨詢芯片詳細信息）
RK3399’s Features
1、 Microprocessor
l - Dual-core ARM Cortex-A72 MPCore processor and Quad-core ARM Cortex-A53 MPCore
processor, both are high-performance, low-power and cached application processor
l - Two CPU clusters. Big cluster with dual-core Cortex-A72 is optimized for high-performance and little cluster with quad-core Cortex-A53 is optimized for low power.
l - Full implementation of the ARM architecture v8-A instruction set, ARM Neon Advanced
SIMD (single instruction, multiple data) support for accelerating media and signal processing
l - ARMv8 Cryptography Extensions.
l - SCU ensures memory coherency between the MPCore for each cluster.
l - TCCI500 ensures the memory coherency between the two clusters
- Each Cortex-A72 integrates 48KB L1 instruction cache and 32KB L1 data cache with 4-way set associative. Each Cortex A53 integrates 32KB L1 instruction cache and 32kB L1 data cache separately with 4-way set associative
l - 1MB unified L2 Cache for Big cluster, 512KB unified L2 Cache for Little cluster.
l - Trustzone technology support
- Full Coresight debug solution
l - Eight separate power domains for CPU core system to support internal power switch and externally turn on/off based on different application scenario
2、Memory Organization
l - Internal on-chip memory
l - External off-chip memory①
3、 Internal Memory
l - Internal BootRom
l - Internal SRAM
4、External Memory or Storage device
l - Dynamic Memory Interface (DDR3/DDR3L/LPDDR2/LPDDR3)
from various vendor
l - eMMC Interface
l - SD/MMC Interface
5、System Component
l - Cortex-M0
- CRU (clock & reset unit)
l - PMU
l - Timer
- PWM
l - WatchDog
- MailBox
l - Bus Architecture
l - Interrupt Controller
l - DMAC
l - Security system
6、Video CODEC
l - Embedded memory management unit(MMU)
l - Video Decoder
l - Video Encoder
7、 JPEG CODEC
l - JPEG decoder
8、Image Enhancement (IEP module)
l - Image pre-processor
l - Video stabilization
l - Image Post-Processor(embedded inside video decoder)
- Image Enhancement-Processor (IEP)
9、 Graphics Engine
-3D Graphics Engine
-2D Graphics Enginel-
10、 Video IN/OUT
l - Camera Interface
- Image Signal Processer
- Display Interface
- Video Output Processor(VOP_BIG)
- Write back
- Embedded memory management unit(MMU)
11、 HDMI
- Single Physical Layer PHY with support for HDMI 1.4 and 2.0 operation
- Link controller flexible interface with 30-, 60- or 120-bit SDR data access
- Support HDCP 1.4/2.2
12、MIPI PHY
-Embedded 3 MIPI PHY, MIPI0 only for DSI, MIPI1 for DSI or CSI, MIPI2 only for CSI
-Lane operation ranging from 80 Mbps to 1.5 Gbps in forward direction
-Each port have 4 data lane, providing up to 6.0 Gbps data rate
-Support 1080p@60fps output with single channel
-Support 2560x1600@60fps output with MIPI0 and MIPI1 dual channel
13、eDP PHY
-Compliant with eDPTM Specification, version 1.3
-Support RGB 6/8/10bit video format
-Up to 4 physical lanes of 2.7/1.62 Gbps/lane
-Support VESA DMT and CVT timing standards
-Fully support EIA/CEA-861Dvideo timing and Info Frame structure
-Hot plug and unplug detection and link status monitor
-Supports Panel Self Refresh(PSR)
14、DisplayPort
-Compliant with DisplayPort Specification, version 1.2
-Compliant with HDCP2.2 (and back compatible with HDCP1.3)
-There is only one DisplayPort controller built-in RK3399 which is shared by 2 Type-C
interface
-25-600Mhz pixel clock
-Supports 8/10 bpp RGB,YCbCr422,YCbCr420formats
-Supports up to 4kx2k at 60Hz resolution
-Variety of audio formats–PCM and compressed, over I2S or SPDIF interfaces
-1Mbps AUX channel
15、TYPE-C Interface
- Embedded 2 Type-C PHY
- Compliant with USB Type-C Specification, revision 1.1
- Compliant with USB Power Delivery Specification, revision 2.0
- Attach/detach detection and signaling as DFP, UFP and DRP
- Plug orientation/cable twist detection
- Enable/disable VBUS as DFP and DRP(when operating as DFP)
- VBUS detection as UFP and DRP(when operating as UFP)
- USB Power Delivery communication across the CC wire
- Support USB3.0 Type-C and DisplayPort 1.2 Alt Mode on USB Type-C. Two PMA TX-only
lanes and two PMA half-duplex TX/RX lanes(can be configured as TX-only or RX-only)
- Up to 5Gbps data rate for USB3.0
- Up to 5.4Gbps(HBR2) data rate for DP1.2, can support 1/2/4 lane mode
- Support DisplayPort AUX channel
16、 Audio Interface
l - I2S0/I2S1 with 8ch
l - I2S2/PCM with 2ch
l - SPDIF
17、 Connectivity
l - SDIO interface
l - GMAC 10/100/1000M Ethernet Controller
l - SPI Controller
l - UART Controller
l - I2C controller
l - GPIO
l - USB OTG3.0
18、USB 2.0 Host
19、PCIe
20、 Others
l - Temperature Sensor(TS-ADC)
-SAR-ADC(Successive Approximation Register)
l - eFuse
l - Package Type
n BGA316 (body: 14mm x 14mm ; ball size : 0.3mm ; ball pitch : 0.65mm)
RK3399’s Block Diagram
RK3399’s Package
RK3399’s Ordering Information
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